Baidu USA logo
Baidu USA
Verified live 2d ago

Low Power SoC Hardware Architect

Brief overview

Sunnyvale, CA, United StatesIn-person
MastersOr in progress
14 H-1B approvalsDept. of Labor
6 green cardsCertified filings
Low power SoC architecturePower efficient designC/C++PerlPythonRTL designSystem architecturePower modelingFloorplanningMethodology development

About the company

Baidu USA logo
Baidu USAbaidu.com

Located in the heart of Silicon Valley, Baidu USA is one of the R&D centers of Baidu, China’s largest search engine provider.

Visa sponsorship history

4 years sponsoring, last filed FY2026

Data powered by U.S. Department of Labor. This does not guarantee sponsorship for this specific role.
14H-1B approved
100%approval rate
4new H-1B hires
6PERM certified
$144,012median wage / yr
H-1B Petition ApprovalsVisas USCIS actually granted: the strongest sign the company sponsors.
20234
20247
20253
LCA Certified ApplicationsAn early filing step, not a visa approval: it signals intent, not confirmed sponsorship.
20231
20241
20251
Green Card (PERM) FilingsCertified green card filings: a long-term commitment to international hires.
20232
20243
20261
Top sponsored roles
Staff AccountantCommunications ManagerStaff Software Engineer
Sponsored employees from
China

Job description

Do you want to be part of the AI revolution? Do you want to think out of the box, thriving on challenges in AI industry and have the desire to solve them? Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities and impact on AI industry?

We’re looking forward to you joining us to collaborate, contribute, and revolutionize AI silicon and system.

Description

As a Low Power SoC Architect, you will have the opportunity to independently design and define the lower power subsystem and improve the power efficiency of AI engine, in both data center and edge SoC. You will collaborate with experienced designers, RTL engineers, system and software team, to explore feasibility of ideas, proof of concept and power performance improvement.

Qualifications

  • Experience and knowledge of lower power soc architecture and deep expertise in lower power subsystem, power efficient design.
  • Lead and drive lower power & most efficient BW to power SoC design, including arch features, RTL changes for low power design, topologies with floorplan/layout and other design aspects
  • Work with IPs architects to drive low power design, methodologies, techniques, and features.
  • Drive SoC level power convergence by using existing modeling tools and techniques, and developing new state of the art tools, flows, and methodologies.
  • Experience and proof of track in power optimization: perf@watt and perf/sq.mm modeling or analysis, is a plus
  • Good teamwork with communications and support to solve all levels of architecture definition from micro-architecture to system level to software architecture.
  • Proficiency in C/C++ and scripting languages such as Perl or Python.
  • Self-driven and leadership skills.
  • Knowledge or experience in automotive industry is a plus.
  • MS or PhD in Electrical or Computer Engineering.
  • Excellent communication skills in both English and Chinese.

Culture Fit:

  • Mission alignment: If you want to be part of a team to accomplish this great mission, we will provide you the best possible platform to do that.
  • Self-directed: We work best with people that are driven, motivated, and aspire to greatness.
  • Hungry to learn: We are eager to see you learn new skills and grow.
  • Team orientation: We work in small, fast-moving teams. We watch out for each other and go after big goals together as a team.

#LI-DNI

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