FPGA Engineer

Summary

Bolt Graphics is a semiconductor startup building high-performance graphics processors. The FPGA Engineer will design and develop FPGA systems using System Verilog, debug and analyze hardware designs, use Xilinx development and debugging tools, document RTL, and collaborate with distributed team members.

Responsibilities

• Develop and design FPGA systems using System Verilog
• Debug / Troubleshoot issues in the design
• Utilize Xilinx Vivado for FPGA development
• Set up and analyze signals using ILA for debugging purposes
• Document RTL using standard practices
• Communicate with team members across different time zones

Skills

• Fluent in System Verilog
• An expert user of Xilinx (acquired by AMD) FPGAs
• Bachelors, Masters in Computer Engineering, Electrical Engineering, or equivalent
• Programming: System Verilog, C/C++
• Experience with the Xilinx Versal platform
• Experience with the Xilinx Alveo platform
• Experience with QSFP+ fiber communication and encoding strategies
• Experience with waveform analysis for debugging and optimization
• Experience with GTY/GTM
• Experience with using and creating custom interfaces using AXI  protocol
• Experience with fixing timing violations through constraints and logic critical path analysis
• Ability to create testbenches to verify functionality of RTL
• Advanced debugging features and signal analysis via ILA
• Ability to read technical documents/standards and design hardware to follow those standards
• Startup experience

Qualifications

Must Haves

• fluent in System Verilog
• an expert user of Xilinx (acquired by AMD) FPGAs
• Bachelors, Masters in Computer Engineering, Electrical Engineering, or equivalent
• Programming: System Verilog, C/C++
• Experience with the Xilinx Versal platform
• Experience with the Xilinx Alveo platform
• Experience with QSFP+ fiber communication and encoding strategies
• Experience with waveform analysis for debugging and optimization
• Experience with GTY/GTM
• Experience with using and creating custom interfaces using AXI  protocol
• Experience with fixing timing violations through constraints and logic critical path analysis
• Ability to create testbenches to verify functionality of RTL
• Advanced debugging features and signal analysis via ILA
• Ability to read technical documents/standards and design hardware to follow those standards
• Startup experience

Benefits

• Medical, Dental, & Vision - 100% covered premiums
• Equity - Stock Options
• 401(k) match
• WFH Hardware