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Etched
Posted 98 days agoVerified live 1d ago

Physical Design Engineer

Brief overview

Cupertino, CAIn-person
2+ yrsMinimum
19 H-1B approvalsDept. of Labor

About the company

A company developing AI inference hardware and transformer accelerators.

Visa sponsorship history

3 years sponsoring, last filed FY2026

Data powered by U.S. Department of Labor. This does not guarantee sponsorship for this specific role.
19H-1B approved
100%approval rate
3new H-1B hires
$216,046median wage / yr
H-1B Petition ApprovalsVisas USCIS actually granted: the strongest sign the company sponsors.
202519
LCA Certified ApplicationsAn early filing step, not a visa approval: it signals intent, not confirmed sponsorship.
20242
20251
20261
Top sponsored roles
Member of Technical Staff, Design VerificationASIC Technical Program ManagerMember of Technical Staff (Design Verification Engineer)Member of Technical Staff (Physical Design Engineer)

Job description

Summary

Etched is building AI chips that are hard-coded for individual model architectures. They are seeking exceptional Physical Design Engineers to work with third-party design services to implement and verify physical designs and improve iteration speed on physical design.

Responsibilities

  • Supervise the outsourcing of physical design to a 3rd party service
  • Deeply understand what is involved in physical design
  • Running Physical Design flows to close blocks, support ASIC infrastructure, automate Physical Design flows, improve CAD infrastructure
  • Drive dashboards that show the convergence of projects related to Physical Design
  • Optimize tool flows, working with EDA vendors to incorporate the latest features
  • Accountable for block level closure

Skills

  • 2+ years of previous experience with PD
  • Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
  • Experience with back-end design and timing closure on 3nm-7nm
  • Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis
  • Deeply creative and able to think from first principles
  • Familiarity with transformer models and machine learning
  • Familiarity with OpenROAD and other automated RTL-to-GDSII flows
  • Ability to program with Python or another scripting language

Qualifications

Must Haves

  • 2+ years of previous experience with PD
  • Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
  • Experience with back-end design and timing closure on 3nm-7nm
  • Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis
  • Deeply creative and able to think from first principles

Nice to Haves

  • Familiarity with transformer models and machine learning
  • Familiarity with OpenROAD and other automated RTL-to-GDSII flows
  • Ability to program with Python or another scripting language

Benefits

  • Full medical, dental, and vision packages, with 100% of premium covered, 90% for dependents
  • Housing subsidy of $2,000/month for those living within walking distance of the office
  • Daily lunch and dinner in our office
  • Relocation support for those moving to Cupertino

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