Summary
LUBIS EDA is a semiconductor verification company focused on ensuring complex chips work correctly before fabrication. The Formal Verification Engineer owns defined formal verification deliverables, develops maintainable SVA and formal environments, drives proof closure, debugs issues with designers, and communicates decision-ready evidence to stakeholders.
Responsibilities
- Own a block/area: clarify requirements, co-define the verification strategy (scope, risks, approach), execute, and close
- Produce maintainable SVA and a clean formal environment (constraints/assumptions with good hygiene)
- Debug efficiently, partner with designers on fixes, and prevent regressions
- Keep stakeholders aligned with crisp updates and decision-ready evidence
- You nail our onboarding bootcamp and earn the team’s trust: you apply the LUBIS way of working and consistently ship clean, reviewable outputs
- You engage confidently in scoping and planning with the team: you clarify open questions early, surface risks, and help translate scope into a concrete plan
- You own a deliverable end-to-end in a defined area and ship it without a “rescuer”
Skills
- Proven experience delivering formal results on non‑trivial RTL (e.g., caches, pipelined processors, DMAs, NoCs)
- Strong SVA skills and hands-on formal tool experience (e.g.: Jasper, VCF, Questa Formal/Onespin)
- Reliable end‑to‑end ownership in a defined scope
Qualifications
Must Haves
- Proven experience delivering formal results on non‑trivial RTL (e.g., caches, pipelined processors, DMAs, NoCs)
- Strong SVA skills and hands-on formal tool experience (e.g.: Jasper, VCF, Questa Formal/Onespin)
- Reliable end‑to‑end ownership in a defined scope
Benefits
- Full-time permanent employment
- Onboarding bootcamp
- Clear career progression path to Senior Formal Verification Engineer
- Review cycles, customer-lead rotations, and clear competency milestones
- Mentoring opportunities as part of progression to Senior Formal Verification Engineer