NVIDIA AI logo
NVIDIA AI
Posted 86 days agoVerified live 1d ago

ASIC Design Engineer - New College Grad 2026

Brief overview

Santa Clara, CAIn-person
UndergradOr in progress
$100k–$167k/yrStated range

Job description

Summary

NVIDIA AI is a leading technology-focused company seeking ASIC Design Engineers to implement world-class SoC's and GPU's. The role involves delivering high-performance RTL designs and collaborating with various teams to achieve design specifications and targets.

Responsibilities

  • As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications
  • Analyze architectural trade-offs based on features, performance requirements and system limitations
  • Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design
  • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks
  • Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines
  • Architect features to help silicon debug and support post-silicon validation activities

Skills

  • Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science
  • Experience in micro-architecture and RTL development (Verilog)
  • Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
  • Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic is required
  • Strong interpersonal skills and an excellent teammate
  • Strong C/C++, Python or Perl skills
  • Good debugging and analytical skills
  • Experience with arbiters, scheduling, synchronization & bus protocols, interconnect networks, caches

Qualifications

Must Haves

  • Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science
  • Experience in micro-architecture and RTL development (Verilog)
  • Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis
  • Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic is required
  • Strong interpersonal skills and an excellent teammate

Nice to Haves

  • Strong C/C++, Python or Perl skills
  • Good debugging and analytical skills
  • Experience with arbiters, scheduling, synchronization & bus protocols, interconnect networks, caches

Benefits

  • You will also be eligible for equity and benefits.

More jobs like this