Summary
Qualcomm Technologies Inc is a leader in the semiconductor industry, and they are seeking an EDA/CAD SW Engineer to develop critical CAD tools for emulation in VLSI design. The role involves developing algorithms for emulation, optimizing compute and storage, and mentoring team members.
Responsibilities
- Work with industry-standard tools and technologies to develop solutions to a variety of infrastructure needs
- Develop critical emulation CAD algorithms that address unique Qualcomm SoC needs (synthesis, partitioning, place and route, clock optimization)
- Drive compute and storage optimization
- Mentor and lead other members of the team
Skills
- Bachelor's degree in Science, Engineering, or related field
- Master's or PhD. in Computer Science, Computer Engineering
- 2+ years ASIC design, FPGA design, verification, or related work experience
- 2+ years C++ SW development, CAD tool development, or related work experience
- 2+ years of hands-on experience with Linux
- 2+ years of direct hands-on experience with CAD SW development, Proven ability of software design principles, practices, and patterns
- Demonstratable knowledge of data structures, algorithms and design patterns
- Experience in the areas of RTL Synthesis (System Verilog -> Netlist), Clock Tree Optimization, Exposure to VLSI design concepts, logic design
- Excellent interpersonal and analytical skills with the ability to work independently, and create customer-facing applications
- Experience with the following: Git, LSF, JIRA, GCC and other related technologies
Qualifications
Must Haves
- Bachelor's degree in Science, Engineering, or related field
Nice to Haves
- Master's or PhD. in Computer Science, Computer Engineering
- 2+ years ASIC design, FPGA design, verification, or related work experience
- 2+ years C++ SW development, CAD tool development, or related work experience
- 2+ years of hands-on experience with Linux
- 2+ years of direct hands-on experience with CAD SW development, Proven ability of software design principles, practices, and patterns
- Demonstratable knowledge of data structures, algorithms and design patterns
- Experience in the areas of RTL Synthesis (System Verilog -> Netlist), Clock Tree Optimization, Exposure to VLSI design concepts, logic design
- Excellent interpersonal and analytical skills with the ability to work independently, and create customer-facing applications
- Experience with the following: Git, LSF, JIRA, GCC and other related technologies
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package