<div>Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.</div>At Tenstorrent, we’re redefining compute performance from the ground up by designing CPUs that power the future of AI and high-performance workloads. As a CPU Microarchitecture &amp; Performance Modeling Intern, you’ll help analyze, model, and optimize real processor designs to push efficiency and speed to new limits. If you love figuring out how every cycle, cache, and pipeline stage adds up to performance, this role is for you!
This role is hybrid based out of Toronto, Boston, Austin or Santa Clara (preferred).
&nbsp;
Who You Are
<ul>
<li>A detail-oriented engineer who loves understanding how CPUs really work — from pipelines and caches to instruction flow and branch prediction.</li>
<li>Excited to turn theoretical architecture concepts into measurable performance insights.</li>
<li>Analytical, curious, and eager to explore the trade-offs between power, area, and performance in modern CPU design.</li>
<li>Comfortable using data and modeling tools to drive real engineering decisions.</li>
<li>Collaborative and motivated to learn from experienced hardware architects in a fast-paced, hands-on environment.</li>
</ul>
&nbsp;
What We Need
<ul>
<li>A co-op or PEY student pursuing a BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field.</li>
<li>Strong foundation in&nbsp;computer architecture and CPU microarchitecture (pipelines, caches, memory hierarchies, branch prediction, etc.).</li>
<li>Experience or coursework in performance modeling, simulation tools, or workload analysis.</li>
<li>Familiarity with CPU workloads and performance metrics (IPC, CPI, latency, throughput, etc.).</li>
<li>Proficiency with Python or other scripting languages for data analysis and automation.</li>
</ul>
&nbsp;
What You Will Learn
<ul>
<li>Develop and run CPU performance models to explore architectural trade-offs and identify bottlenecks.</li>
<li>Conduct CPU workload analysis using real benchmarks and synthetic tests to measure performance efficiency.</li>
<li>Collaborate with microarchitecture and RTL teams to connect performance data with design decisions.</li>
<li>Support validation and tuning of CPU pipelines, memory subsystems, and branch prediction logic.</li>
<li>Automate data collection, visualization, and reporting workflows for performance experiments.</li>
<li>Contribute to ongoing research on improving CPU design methodologies for next-generation compute architectures.</li>
</ul>
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<div>
Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.</div>
</div><div>This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.</div>

CPU Architecture Intern

Jim Keller

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