PD Intern

Summary

Etched is building the world’s first AI inference system purpose-built for transformers, delivering over 10x higher performance and dramatically lower cost and latency. As a Physical Design intern, you will be responsible for realizing front-end designs in silicon and assisting in the development of Physical Design flows.

Responsibilities

• Realizing our front-end designs in silicon
• Helping Etched to improve iteration speed to final signoff
• Assist in developing and running Physical Design flows to synthesize blocks
• Automate final design checks
• Advise RTL design decisions

Skills

• Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field
• Familiarity with high-speed digital logic
• Exposure to ASIC or SoC design concepts
• Familiarity with SystemVerilog, UVM, or Python
• Familiarity with verification work and writing test benches
• Familiarity with physical design flows and tooling
• Are able to learn quickly about transformers and other aspects of modern artificial intelligence
• Familiarity with transformer models and machine learning
• Familiarity with numerical representations and functions (RTL)
• Familiarity with clocking and reset schemes (RTL/PD)
• UVM or formal verification experience (DV)
• Ability to program with Python or another scripting language

Qualifications

Must Haves

• Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field
• Familiarity with high-speed digital logic
• Exposure to ASIC or SoC design concepts
• Familiarity with SystemVerilog, UVM, or Python
• Familiarity with verification work and writing test benches
• Familiarity with physical design flows and tooling
• Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Nice to Haves

• Familiarity with transformer models and machine learning
• Familiarity with numerical representations and functions (RTL)
• Familiarity with clocking and reset schemes (RTL/PD)
• UVM or formal verification experience (DV)
• Ability to program with Python or another scripting language

Benefits

• 12-week paid internship
• Generous housing support for those relocating
• Daily lunch and dinner in our office
• Based at our office in San Jose, CA
• Direct mentorship from industry leaders and world-class engineers
• Opportunity to work on one of the most important problems of our time