DSP Designer

Summary

Fidus is a global high-tech design firm specializing in electronic product development across hardware, embedded software, FPGA/ASIC, and signal integrity. The DSP Designer will develop and deliver complex signal processing algorithms from concept through simulation, fixed-point implementation, and hardware bring-up, collaborating with customers and FPGA/hardware teams. The role also involves algorithm validation, hardware architecture support, lab characterization, and technical documentation across multiple application domains.

Responsibilities

• Develop and simulate DSP algorithms (equalization, filtering, estimation, detection) in MATLAB/Simulink and/or Python, from concept through fixed-point validation
• Perform quantization/bit-width analysis and produce bit-true fixed-point models suitable for HDL implementation
• Collaborate with FPGA/HDL and hardware teams to translate algorithms into feasible hardware architectures (pipelining, MAC/resource budgeting, timing closure)
• Support HDL verification through golden-model test vectors and co-simulation
• Support lab bring-up, characterization, and tuning of DSP-based hardware against real-world channel/sensor behavior
• Adapt existing DSP toolkits to new client domains and standards across multiple engagements (e.g., communications, Aerospace & Defense, Space & Satellite, Industrial Automation, Automotive, Medical Devices, and Semiconductor)
• Document algorithm design decisions, trade-offs, and validation results for client and internal reference

Skills

• * BS/MS/PhD in Electrical Engineering, Applied Physics, or related field
• * Strong foundation in signals and systems: Fourier/Z-transform, digital filter design (FIR/IIR), sampling theory
• * Practical experience with estimation/detection theory (e.g., matched filtering, MMSE, Kalman filtering) or adaptive filtering (LMS/RLS)
• * Proficiency in MATLAB/Simulink and/or Python for algorithm design and simulation
• * Experience with fixed-point conversion and quantization trade-off analysis
• * Demonstrated ability to work across the algorithm-to-hardware boundary (collaborating directly with HDL/FPGA teams)
• * Strong verbal and written communication skills - ability to explain algorithm trade-offs to non-DSP stakeholders
• * Embraces AI as part of a modern engineering toolkit
• Location and travel: Fully remote role and requires around 15% travel, including domestic and international
• * Experience in one or more of: optical/wireless communications, radar/sensing, motor control, biomedical signal processing, semiconductor test
• * Experience with high-speed SerDes and PAM4 signaling (e.g., PCIe Gen6, 400G/800G Ethernet electrical) - equalization (FFE/CTLE/DFE), link training, and FEC awareness
• * Familiarity with AMD's Adaptive Computing portfolio (Versal, Alveo) or embedded x86 product lines
• * Familiarity with HDL Coder, HLS, or Simulink-to-HDL co-simulation workflows
• * Hands-on lab experience (scope, VNA, BERT, or domain-equivalent test equipment)
• * Exposure to safety-critical or regulated development processes (DO-178C/DO-254, ISO 26262, IEC 62304/60601) - valued for A&D, automotive, and medtech engagements specifically
• * Experience adapting quickly across multiple industries or client domains (consulting/services background a plus)
• * Exposure to AI/ML techniques applied to signal processing on FPGAs, GPUs, NPUs, or CPUs
• * Experience with dedicated DSP processors (e.g., Analog Devices, Texas Instruments)
• * Experience with RF front-end systems and data converter interfaces (ADC/DAC), including digital up/down-conversion (DUC/DDC)

Qualifications

Must Haves

• * BS/MS/PhD in Electrical Engineering, Applied Physics, or related field
• * Strong foundation in signals and systems: Fourier/Z-transform, digital filter design (FIR/IIR), sampling theory
• * Practical experience with estimation/detection theory (e.g., matched filtering, MMSE, Kalman filtering) or adaptive filtering (LMS/RLS)
• * Proficiency in MATLAB/Simulink and/or Python for algorithm design and simulation
• * Experience with fixed-point conversion and quantization trade-off analysis
• * Demonstrated ability to work across the algorithm-to-hardware boundary (collaborating directly with HDL/FPGA teams)
• * Strong verbal and written communication skills - ability to explain algorithm trade-offs to non-DSP stakeholders
• * Embraces AI as part of a modern engineering toolkit
• Location and travel: Fully remote role and requires around 15% travel, including domestic and international

Nice to Haves

• * Experience in one or more of: optical/wireless communications, radar/sensing, motor control, biomedical signal processing, semiconductor test
• * Experience with high-speed SerDes and PAM4 signaling (e.g., PCIe Gen6, 400G/800G Ethernet electrical) - equalization (FFE/CTLE/DFE), link training, and FEC awareness
• * Familiarity with AMD's Adaptive Computing portfolio (Versal, Alveo) or embedded x86 product lines
• * Familiarity with HDL Coder, HLS, or Simulink-to-HDL co-simulation workflows
• * Hands-on lab experience (scope, VNA, BERT, or domain-equivalent test equipment)
• * Exposure to safety-critical or regulated development processes (DO-178C/DO-254, ISO 26262, IEC 62304/60601) - valued for A&D, automotive, and medtech engagements specifically
• * Experience adapting quickly across multiple industries or client domains (consulting/services background a plus)
• * Exposure to AI/ML techniques applied to signal processing on FPGAs, GPUs, NPUs, or CPUs
• * Experience with dedicated DSP processors (e.g., Analog Devices, Texas Instruments)
• * Experience with RF front-end systems and data converter interfaces (ADC/DAC), including digital up/down-conversion (DUC/DDC)

Benefits

• Medical plan
• Dental plan
• Vision plan
• Matching 401(k) contributions
• Annual profit-sharing bonus
• Fully remote role