FE Engineer

Summary

Apple creates consumer technology products and experiences through collaboration and innovation. The FE Engineer will work with SoC design, verification, timing, and physical design teams to develop and integrate sophisticated system-on-chip designs, implement RTL, and ensure power, timing, and design-for-test requirements are met.

Responsibilities

• Work with other specialists that are members of the SoC Design, Soc Design Verification, System Verification, STA, and Physical Design teams to implement designs/flows for sophisticated Socs
• Integrate various IPs and ensure design meets DFT (design-for-test), CDC (clock domain crossing), Synthesis/Static Timing and Power Requirements
• Work with CAD and Flow teams to define and improve front-end design methodologies
• Develop micro-architecture and design specifications
• Implement and verify sophisticated logic designs
• Work with designers on STA, physical, power and logical issues
• Participate in meetings, discussions, and writing documentation to ensure clear communication and thorough understanding of design requirements and progress
• Develop RTL design of one or more blocks following established design guidelines based on microarchitecture spec
• Optimize power/performance

Skills

• Master's degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field
• Utilizing System Verilog or Verilog to write RTL for the wireless communication IPs
• Utilizing scripting languages (python, perl, or TCL), including automating the RTL integration flow, synthesis and timing reports, and building hardware modules
• Utilizing CDC, RDC tools, and knowledge of multiple clock domains, multiple reset domains and fix the issues to ensure digital logic is functioning properly
• Utilizing RTL design with complex FSMs, and power saving features
• Utilizing IP integration including clock/reset module design, clock/power gating implementation, fabric/bus-system configuration and design
• Implementing industry low power methodologies including UPF/CPF and lower power check techniques
• Utilizing high speed interface design (source synchronous bus, etc)
• Utilizing synthesis tools from Synopsys, Cadence and setting the correct constraints for synthesis, and knowledge of LEC/LEQ tools and ECOs
• Understanding computer architecture and SoC
• Utilizing low power design concepts and implementation, including clock gating, power gating, and DVFS to reduce power consumption

Qualifications

Must Haves

• Master's degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field
• Utilizing System Verilog or Verilog to write RTL for the wireless communication IPs
• Utilizing scripting languages (python, perl, or TCL), including automating the RTL integration flow, synthesis and timing reports, and building hardware modules
• Utilizing CDC, RDC tools, and knowledge of multiple clock domains, multiple reset domains and fix the issues to ensure digital logic is functioning properly
• Utilizing RTL design with complex FSMs, and power saving features
• Utilizing IP integration including clock/reset module design, clock/power gating implementation, fabric/bus-system configuration and design
• Implementing industry low power methodologies including UPF/CPF and lower power check techniques
• Utilizing high speed interface design (source synchronous bus, etc)
• Utilizing synthesis tools from Synopsys, Cadence and setting the correct constraints for synthesis, and knowledge of LEC/LEQ tools and ECOs
• Understanding computer architecture and SoC
• Utilizing low power design concepts and implementation, including clock gating, power gating, and DVFS to reduce power consumption

Benefits

• Opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs
• Eligible for discretionary restricted stock unit awards
• Ability to purchase Apple stock at a discount through Apple’s Employee Stock Purchase Plan, if voluntarily participating
• Comprehensive medical and dental coverage
• Retirement benefits
• A range of discounted products and free services
• Reimbursement for certain educational expenses, including tuition, for formal education related to advancing your career at Apple
• This role might be eligible for discretionary bonuses or commission payments
• This role might be eligible for relocation