Summary
Apple develops consumer technology products and experiences, and is seeking a Physical Design Engineer to support physical implementation and timing closure for core platforms and SoCs. The role involves collaborating with logic design teams, completing netlist-to-GDS2 implementation, performing verification and signoff, resolving design issues, and optimizing power, performance, and area.
Responsibilities
- Collaborate with the logic design team to understand partition architecture and drive physical aspects early in the design cycle
- Complete the net list to GDS2 implementation for partition(s), meeting schedule and design goals
- Perform timing, physical, and electrical verification, and driving signoff closure for the partitions
- Generate and implement ECOs to rectify timing, noise, and EM IR violations
- Resolve design and flow issues related to physical design, while identifying potential solutions and driving execution
- Drive optimization of PnR partitions to achieve the best Power/Performance/Area
- Streamline the timing signoff criteria, timing analysis methodologies, and flows (critical path spice simulation), and develop/enhance auto ECO generation scripts for timing closure
- Responsible for hands-on physical implementation and timing closure of core platforms and Socs
Skills
- Master's degree or foreign equivalent in Electrical and Computer Engineering, or related field
- Utilizing PNR tools like ICC / ICC2 / Innovus to be used for place and route, including floor planning, placement, clock optimization, routing, timing and power optimization for the design of partitions on SoCs
- Utilizing timing analysis tools like Synopsys PrimeTime to be used for timing analysis, and timing ECO generation for timing closure of partitions on SoCs
- Utilizing TCL / Perl / Python and Unix scripting to summarize data, improve execution efficiency and implement custom scripts to aid partition closure
- Understanding of PD construction and analysis flow and methodologies to be able to successfully execute on, close and signoff partitions on SoCs
- Understanding transistors and digital circuits to meet specific requirements and make appropriate trade-offs during implementation, closure and signoff of partitions on SoCs
- Understanding results from EMIR analysis tools like Voltus or Redhawk and generating fixes to address violations or improve QoR
- Understanding results from Physical verification tools like calibre and generating fixes to address violations
Qualifications
Must Haves
- Master's degree or foreign equivalent in Electrical and Computer Engineering, or related field
- Utilizing PNR tools like ICC / ICC2 / Innovus to be used for place and route, including floor planning, placement, clock optimization, routing, timing and power optimization for the design of partitions on SoCs
- Utilizing timing analysis tools like Synopsys PrimeTime to be used for timing analysis, and timing ECO generation for timing closure of partitions on SoCs
- Utilizing TCL / Perl / Python and Unix scripting to summarize data, improve execution efficiency and implement custom scripts to aid partition closure
- Understanding of PD construction and analysis flow and methodologies to be able to successfully execute on, close and signoff partitions on SoCs
- Understanding transistors and digital circuits to meet specific requirements and make appropriate trade-offs during implementation, closure and signoff of partitions on SoCs
- Understanding results from EMIR analysis tools like Voltus or Redhawk and generating fixes to address violations or improve QoR
- Understanding results from Physical verification tools like calibre and generating fixes to address violations
Benefits
- Opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs
- Eligibility for discretionary restricted stock unit awards
- Ability to purchase Apple stock at a discount through Apple’s Employee Stock Purchase Plan, if voluntarily participating
- Comprehensive medical and dental coverage
- Retirement benefits
- A range of discounted products and free services
- Reimbursement for certain educational expenses, including tuition, for formal education related to advancing your career at Apple
- This role might be eligible for discretionary bonuses or commission payments
- This role might be eligible for relocation