ASIC Design Engineer — Neural Engine DMA

Summary

Apple is a leading technology company, and they are seeking an ASIC Design Engineer for their Neural Engine DMA team. In this role, you will be responsible for designing high-performance DMA engines that facilitate data movement for various AI capabilities, collaborating with architecture and verification teams throughout the design cycle.

Responsibilities

• Writing well-parameterized RTL structured for correct synthesis, clean timing, and low power, along with assertions and cover points that encode design intent and ensure verification completeness
• Executing front-end implementation tasks: synthesis, timing closure, area and power analysis, linting, and logic equivalence checks
• Collaborating with fellow designers and architecture teams to understand design requirements, contribute to micro-architectural specifications, and develop solutions that meet performance, power, and area targets
• Working closely with design verification and formal verification teams to ensure functional correctness: reviewing test plans, debugging failures, and ensuring the design's intended behavior is fully exercised

Skills

• Bachelors Degree plus 0 years of industry experience
• Familiarity with Verilog or SystemVerilog and core digital design fundamentals: finite state machines, pipelining, parallelism, and timing
• Some exposure to on-chip bus protocols such as AMBA (AXI, AHB, APB)
• Interest in or exposure to system-level concepts: how data moves through a SoC, flow control between producers and consumers, memory system latency and bandwidth trade-offs, and how hardware and software divide responsibilities at system boundaries
• Background in or curiosity about high-bandwidth domains: networking, image and video processing, multimedia, or AI/ML
• Familiarity with scripting languages (Python, Perl, Tcl) for design automation
• Clear technical writing skills and the habits of asking good questions, flagging issues early, and contributing constructively in design reviews

Qualifications

Must Haves

• Bachelors Degree plus 0 years of industry experience

Nice to Haves

• Familiarity with Verilog or SystemVerilog and core digital design fundamentals: finite state machines, pipelining, parallelism, and timing
• Some exposure to on-chip bus protocols such as AMBA (AXI, AHB, APB)
• Interest in or exposure to system-level concepts: how data moves through a SoC, flow control between producers and consumers, memory system latency and bandwidth trade-offs, and how hardware and software divide responsibilities at system boundaries
• Background in or curiosity about high-bandwidth domains: networking, image and video processing, multimedia, or AI/ML
• Familiarity with scripting languages (Python, Perl, Tcl) for design automation
• Clear technical writing skills and the habits of asking good questions, flagging issues early, and contributing constructively in design reviews

Benefits

• Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs.
• Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.
• You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.
• Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.